Aria G25 GPIO NOTES =-=-=-=-=-=-=-=-=-= Note: The following description makes reference to the Atmel AT91SAM9G25 micro-controller unit (MCU) and the Aria G25 board. To avoid confusion, the MCU is called the G25 and the Aria board is called the Aria G25 or just the "Aria". Aria G25 GPIO lines =================== The micro-controller unit (MCU) on the Aria G25 board is an Atmel AT91SAM9G25. This MCU is closely related to the AT91SAM9G20 used on the Fox G20 board (see the foxg20_gpio.txt file). With the exception of the G20,The AT91SAM9G25 is one of a family of MCUs released around 2011 that are sometimes referred to by the family name of "AT91SAM9x5". Other MCUs in that family are the AT91SAM9G15, AT91SAM9X25 and the AT91SAM9G35. The G25 has 105 GPIO lines arranged in 4 banks: PA0 to PA31, PB0 to PB18, PC0 to PC31 and PD0 to PD21. Each bank has a separate PIO controller: PIOA, PIOB, PIOC and PIOD. All GPIO lines on the Aria G25 board run at the same power supply voltage which the G25 configures as 3.3 volts. Although these lines may be configured as GPIOs, many of the lines alternatively provide specialized functionality as well, see below. All of the G25 GPIO lines are restricted to an absolute maximum voltage tolerance of not greater than +4 volts and not less than -0.3 volts. PA0 to PA31, PB0 to PB18 and PD0 to PD21 are limited to sourcing/sinking 8 milliamps (mA). PC0 to PC31 has a source/sink limit of 4 mA. The total output current on all IO lines must not exceed 350 mA. The G25 provides 12 multiplexed analog-to-digital (A/D) lines on PB6-PB17. The Aria brings out only four, AD0-AD3 (PB11-PB14) which are marked on the Aria as W20-W23. A separate A/D power supply pin, VDDANA, is connected to the 3.3 volt power line internally within the Aria. The A/D reference voltage input pin, ADVREF, is exposed on the Aria at W19. The G25 manual states the minimum voltage the should be placed on ADVREF is 2.4 volts and the maximum voltage is VDDANA. Each GPIO line can either be a fully user configurable general purpose IO (with the exception of the A/D lines which have a specialized interface) or one of four peripheral functions. Each fully user configurable general purpose IO line is controlled by a PIO unit. The peripheral functions are controlled by other units in the G25 silicon (e.g. the USART unit for serial (RS232) and the HSMCI unit for SD card interface). The four selected peripheral functions are termed "Peripheral A", "Peripheral B", "Peripheral C" and "Peripheral D". The G25 manual (revision A updated 07/2011) shows the various peripheral mappings for each GPIO line in the "Package and Pinout" section (4.4) . These same mapping are shown below. Note the Aria G25 uses the 217 ball BGA package (not the 247 ball BGA). The G25 does not map anything to "Peripheral D". An interesting feature of the multiplexing on I/O lines is that it only applies to the output direction. In the input direction the external line can be thought of as connecting to the gpio (PIO) function and the peripheral function at the same time. An example of an output (or bidirectional) line is PA30 which can be either: a) TWD0 [Peripheral A] "two wire" (I2C) data line, or b) SPI1_NPCS3 [Peripheral B] a SPI chip select line, or c) EMDC [Peripheral C] Ethernet management data clock, or d) a user configurable GPIO line (i.e. PIO controller) TWD0 and SPI1_NPCS3 are not available on any other line while EMDC is also available on PB6, Peripheral A. PB6 is also AD7. So if one wants to use TWD0/TCK0 (i.e. first I2C bus) and Ethernet then AD7 cannot be used. An internal pull-up or an internal pull-down resistor can be configured on each GPIO line. This is a mutually-exclusive feature, that is both cannot be enabled at the same time. Each GPIO pull-up and pull-down resistor will present an impedance of between 40,000 to 190,000 Ohms, with a typical value of around 75,000 Ohms. In the absence of any other settings by the AT91Bootstrap, Ariaboot/uBoot, the Linux kernel and user space programs, all GPIO lines are initialized to "pure" input mode with the pull-up configured. As such each pin appears at +3.3 V (a '1') until otherwise pulled to ground or configured differently. Some, but not all of the functions of a GPIO line depend on a peripheral clock being provided to the associated PIO unit. All the peripheral clocks in the G25 are controlled by the Power Management Controller (PMC). PIOA and PIOB use peripheral clock 2 while PIOC and PIOD use peripheral clock 3. Many peripheral clocks are turned off by default at boot up to save power. Since so much IO involves the GPIO lines on the G25, by the time a user space program gets to work with the PIO units, the corresponding peripheral clocks will probably both be on. Aria G25: GPIOs and associated peripheral function ================================================== Below are the GPIO lines supported by the G25. Associated peripheral functions using the Atmel naming conventions are shown. Although the G25 provides four different peripheral functions associated with each line (i.e. peripheral A, B, C and D) the G25 doesn't map any actual peripheral functions to "peripheral D". This choice was probably made as a tradeoff between size of the Aria G25 and the utility expected. Hence there are three potential peripheral functions shown below, comma separated. An indication of "-" means that there is no mapped peripheral function. Some GPIO line entries below have a trailing item in square brackets: it is the corresponding Aria G25 module pin name which uses a compass naming convention (i.e. "N" for north, "S" for south, etc). PA* PB* ------------------------------------------------------------------- PA0: TXD0, SPI1_NPCS1, - [S23] PB0: ERX0, RTS2, - PA1: RXD0, SPI0_NPCS2, - [S22] PB1: ERX1, CTS2, - PA2: RTS0, MCI1_DA1, ETX0 [S21] PB2: ERXER, SCK2, - PA3: CTS0, MCI1_DA2, ETX1 [S20] PB3: ERXDV, SPI0_NPCS3, - PA4: SCK0, MCI1_DA3, ETXER [S19] PB4: ETXCK, TWD2, - PA5: TXD1, -, - [S18] PB5: EMDIO, TWCK2, - PA6: RXD1, -, - [S17] PB6/AD7: EMDC, -, - PA7: TXD2, SPI0_NPCS1, - [S16] PB7/AD8: ETXEN, -, - PA8: RXD2, SPI1_NPCS0, - [S15] PB8/AD9: ETXER, -, - PA9: DRXD, -, - [S14] PB9/AD10: ETX0, PCK1, - PA10: DTXD, -, - [S13] PB10/AD11: ETX1, PCK0, - PA11: SPI0_MISO, MCI1_DA0, - [S12] PB11/AD0: ETX2, PWM0, - [W20] PA12: SPI0_MOSI, MCI1_CDA, - [S11] PB12/AD1: ETX3, PWM1, - [W21] PA13: SPI0_SPCK, MCI1_CK, - [S10] PB13/AD2: ERX2, PWM2, - [W22] PA14: SPI0_NPCS0, -, - [S9] PB14/AD3: ERX3, PWM3, - [W23] PA15: MCI0_DA0, -, - [S8] PB15/AD4: ERXCK, -, - PA16: MCI0_CDA, -, - [S7] PB16/AD5: ECRS, -, - *** PA17: MCI0_CK, -, - [S6] PB17/AD6: ECOL, -, - PA18: MCI0_DA1, -, - [S5] PB18: IRQ, ADTRG, - PA19: MCI0_DA2, -, - [S4] PA20: MCI0_DA3, -, - [S3] PA21: TIOA0, SPI1_MISO, - [S2] PA22: TIOA1, SPI1_MOSI, - [W9] PA23: TIOA2, SPI1_SPCK, - [W10] PA24: TCLK0, TK, - [W11] PA25: TCLK1, TF, - [W12] PA26: TCLK2, TD, - [W13] PA27: TIOB0, RD, - [W14] PA28: TIOB1, RK, - [W15] PA29: TIOB2, RF, - [W16] PA30: TWD0, SPI1_NPCS3, EMDC [W17] PA31: TWCK0, SPI1_NPCS2, ETXEN [W18] PC* PD* ------------------------------------------------------------------- PC0: -, ISI_D0, TWD1 [N2] PD0: NANDOE, -, - PC1: -, ISI_D1, TWCK1 [N3] PD1: NANDWE, -, - PC2: -, ISI_D2, TIOA3 [N4] PD2: A21/NANDALE, -, - PC3: -, ISI_D3, TIOB3 [N5] PD3: A22/NANDCLE, -, - PC4: -, ISI_D4, TCLK3 [N6] PD4: NCS3, -, - PC5: -, ISI_D5, TIOA4 [N7] PD5: NWAIT, -, - PC6: -, ISI_D6, TIOB4 [N8] PD6: D16, -, - PC7: -, ISI_D7, TCLK4 [N9] PD7: D17, -, - PC8: -, ISI_D8, UTXD0 [N10] PD8: D18, -, - PC9: -, ISI_D9, URXD0 [N11] PD9: D19, -, - PC10: -, ISI_D10, PWM0 [N12] PD10: D20, -, - PC11: -, ISI_D11, PWM1 [N13] PD11: D21, -, - PC12: -, ISI_PCK, TIOA5 [N14] PD12: D22, -, - PC13: -, ISI_VSYNC, TIOB5 [N15] PD13: D23, -, - PC14: -, ISI_HSYNC, TCK5 [N16] PD14: D24, -, - PC15: -, ISI_MCK, PCK0 [N17] PD15: D25, A20, - PC16: -, -, UTXD1 [N18] PD16: D26, A23, - PC17: -, -, URXD1 [N19] PD17: D27, A24, - PC18: -, -, PWM0 [N20] PD18: D28, A25, - PC19: -, -, PWM1 [N21] PD19: D29, NCS2, - PC20: -, -, PWM2 [N22] PD20: D30, NCS4, - PC21: -, -, PWM3 [N23] PD21: D31, NCS5, - PC22: -, TXD3, - [E2] PC23: -, RXD3, - [E3] PC24: -, RTS3, - [E4] PC25: -, CTS3, - [E5] PC26: -, SCK3, - [E6] PC27: -, -, RTS1 [E7] PC28: -, -, CTS1 [E8] PC29: -, -, SCK1 [E9] PC30: -, -, - [E10] PC31: FIQ, -, PCK1 [E11] For the full pinout of the Aria G25 (24 pins on each of the four sides) see the Acme Systems web site: http://www.acmesystems.it/ariag25_pinout On the Aria G25 module there is a small green LED which is illuminated when the PB8 is driven high. Note that most but not all IO functions come out via GPIO lines. An example of IO not using GPIO lines are the USB ports. G25 GPIOs compared to those on the G20 ====================================== The capabilities of the user configurable GPIO lines on the AT91SAM9G25 can be considered a rough superset of the capabilities of the GPIO lines on the AT91SAM9G20. The extra capabilities on the G25 are: - optional pull-down resistor (typically 40 kohm) - more interrupt trigger options; falling and rising edges, low and high levels - optional debouncing filter on input (actually it's a slow speed glitch filter) - more multiplexed peripheral functions on each GPIO line; G20 has 2 while the G25 has 4 of which 3 are used - ability to write protect most of the important settings on all lines of a PIO controller (i.e. PIOA, PIOB, PIOC or PIOD) - optional Schmitt trigger (the G20 has it always configured) - some other features (e.g. IO delay register) that aren't well explained by Atmel :-) At a programming level the memory mapped IO locations controlling PIOA, PIOB and PIOC are the same on the G25 and the G20. [The G20 doesn't have a PIOD.] All registers on the G20 are supported on the G25 apart from the peripheral selection register. The difference is the G20 has PIO_ASR, PIO_BSR and PIO_ABSR (at offsets 0x70, 0x74 and 0x78 respectively); while the G25 has PIO_ABCDSR1 and PIO_ABCDSR2 (at offsets 0x70 and 0x74 respectively). Since the mapped peripheral functions that those registers control differ between the G20 and G25, this is not a significant problem in practice. Linux gpio kernel line numbers ============================== Linux supports a generic GPIO interface for reading and setting individual lines. It is found in the sysfs pseudo file system (under the /sys/class/gpio directory) when the kernel is built with CONFIG_GPIO_SYSFS set. The kernel uses a 'gpio kernel line number' as the primary key for addressing GPIOs. Earlier kernels started the sequence of gpio kernel line numbers at 32 corresponding to PA0. So 64 corresponded to PB0, 96 to PC0 and 159 to PD21. The reason for starting at 32 was some connection with interrupts, with numbers 0 to 31 reserved for other uses. Both the Aria G25 and the Fox G20 have a gpio kernel line numbering scheme like this in Linux kernel (lk) 2.6.39 (and earlier) and lk 3.2.20 . Obviously this confused a lot of people so in lk 3.7.0 (and perhaps lk 3.6.*) the gpio kernel line numbering scheme now is origin 0. That is line number 0 corresponds to PA0. [This may also be related to the introduction of "device tree" or "open firmware" support for Atmel MCUs in these later kernels.] This change will cause pain for existing programs. My utilities (see the next section) when given the '-p b -b 7' form of command line options (for PB7) determine the correct gpio kernel line number (either 71 or 39) by checking if this directory name exists: /sys/class/gpio/gpiochip0 . If it does then origin 0 numbering is assumed (so PB7 corresponds to 39). Utilities for supporting G20 and G25 GPIOs ========================================== For several versions this package has had the g20gpio_status and g20gpio_set utilities to support the PIO controllers (and hence the GPIOs) on the AT91SAM9G20. This version expands that support and adds support for the G25 in the same utilities. Since the code is very similar it was decided to control support for either the G20 or the G25 by: - command line options '-0' (for the G20) or '-5' (for the G25), or - by the invocation name (e.g. invoking g25gpio_status will assume the G25) The latter is done by creating a (hard) link at install time between the actual utility name (e.g. g20gpio_status) and the file system file name: g25gpio_status. Then when the utility is executed it checks what name it was invoked by. These utilities are documented via their help options. Use '-h' and/or '-hh' to read the available help. Also these utilities contain useful tables within the code that can be enumerated with the '-e' and/or '-ee' options. For example 'g25gpio_status -ee' will show the GPIO line to peripheral functions mappings for PIOA, PIOB, PIOC and PIOD. And 'g25gpio_status -ee -pB' will show the same mapping for PIOB. Note that g20gpio_status and g20gpio_set bypass the Linux kernel and access the memory mapped IO registers of PIOA to PIOD. So superuser permissions are needed to execute these utilities. There are also simpler utilities called: readbits and setbits that use the generic GPIO interface in the Linux sysfs pseudo file system (see the previous section). More advanced things can be done with the gpio_sysfs utility including counting input events (transitions) on GPIO inputs. Notes ===== *** - Atmel's at91sam9x5/25-ek board uses this pin (PB16) as USB cable detect (VBUS) on the device side. Since Acme doesn't bring this GPIO out to the edge of the Aria, another gpio needs to be chosend for this purpose. Active high, Atmel use a 47k/82k resistor divider to get "high" below 3.3 volts. Douglas Gilbert 20130520 [with contributions from Mark Richards]