A very good overview of the various bus types touched on in this appendix (both SCSI and others) can be found at www.pctechguide.com/04disk2.htm.

SCSI.  The original SCSI 1 standard (ANSI specification X3.131-1986) introduced an 8 bit parallel bus that was able to do asynchronous transfers at 1.5 MegaBytes/sec and synchronous transfers up to 5 MB/sec. SCSI commands are sent at the asynchronous rate. SCSI data is transferred either at the asynchronous rate (worst case) or a negotiated synchronous rate (with 5 MB/sec being the best case).

FAST SCSI.  The SCSI 2 standard raised the maximum synchronous speed to 10 MB/sec. SCSI 2 defined several parallel buses: single ended (as used by SCSI 1) and a new differential bus. The differential bus has better noise immunity and its maximum bus length is 25 metres (compared with single ended's 6 metres). Tagged queuing of commands was also added by SCSI 2.

WIDE SCSI.  The SCSI 2 standard also increased the width of the bus allowing 16 and 32 bit "wide" variants. Very little use has been made of the 32 bit width so "wide" usually refers to a 16 bit wide data path. The maximum number of SCSI devices that can connect to a parallel SCSI bus is directly related to the bus width hence "wide" buses allow a maximum of 16 SCSI devices to be connected. [At least one of those devices must be the SCSI "initiator" which is usually a host adapter.]

ULTRA SCSI.  Traditionally synchronous buses are clocked either on the rising or falling edge of the clock (which is normally a square wave). A recent trend has been to clock on both edges and thus double the available bandwidth. This is how ULTRA SCSI doubles the SCSI 2 "fast" speed to 20 MB/sec.

ULTRA WIDE SCSI.  The same "ultra" technique applied to a (16 bit) wide SCSI parallel bus yields a bandwidth of 40 MB/sec.

ULTRA 2 WIDE SCSI.  This variant introduces a new "low voltage" differential signalling (LVD) that allows the synchronous clock speed to be doubled yielding 80 MB/sec when using a (16 bit) wide bus. In this case the maximum SCSI bus length is 12 metres. To be backward compatible with ULTRA WIDE this variant can fall back to "single ended" operation. This leads to the abbreviation LVD/SE being used by adapter manufacturers. One shortcoming of this approach is that the presence of one UW device on a U2W bus will cause all other U2W devices to communicate at the slower (i.e. UW) rate. Some adapters overcome this by having separate LVD and SE physical buses on the same logical SCSI bus.

ULTRA 160 SCSI.  ULTRA 160 doubles parallel SCSI bus bandwidth yet again. It uses a 16 bit wide data path, LVD signalling (see previous entry) and double transition clocking that increases the maximum synchronous bandwidth to 160 MB/sec. Additional features include cyclic redundancy codes (CRC) to improve data integrity (compared with a parity bit) and domain validation which adjusts transfer rates if the error rate is too high.

ULTRA 320 SCSI.  Shortly ULTRA 320 adapters will be available (disks with that interface are already on the market). This is also a 16 bit wide LVD bus that can fall back to slower speeds for compatibility with older devices. It extends the features of Ultra 160 by doubling the clock speed. Packetized SCSI which sends commands and status at full bus speed (rather than 5 MB/sec) is included. Other improvements include "quick arbitration and selection", "read and write data streaming" and CRC protection for command blocks as well as data (Ultra 160 had CRC protection for data only). Note that adapter cards using 64 bit PCI (or better: PCI-X) are required to stop the PCI bus being a bottleneck at these speeds. More information can be found at www.scsita.org. Recently an Ultra 320 HBA vendor claimed up to 105,000 IO operations per second which implies per command SCSI bus overhead is less than 10 microseconds. There is a draft ULTRA 640 standard but that may be overtaken by Serial Attached SCSI.

Serial Attached SCSI (SAS).  Serial Attached SCSI (SAS) uses the same transport technology as Serial ATA (sATA) and extends it. [sATA is described below.] SAS can use external expanders to control up to 16000 devices from a single HBA. The data transfer is full duplex and 1.5 Gbps or 3.0 Gbps "phys"s can be aggregated to increase bandwidth. Cable lengths can be up to 6 meters. SAS disks are dual ported. sATA disks can be connected to a SAS expanders (but SAS disks can't be connected to a sATA HBA). SAS was demonstrated at CeBit recently but won't reach the market until 2004.

FC-AL.  This stands for Fibre Channel - Arbitrated Loop and may involve dual 2 Gigabit per second single mode fibre optic links spanning 10 kilometres with throughput of up to 400 MegaBytes per second. Often associated with storage area networks (SANs). Up to 126 devices can be attached to a loop which in turn can be extended to 16 million devices in public loop mode. The transmission medium isn't necessarily fibre optic cable: copper (in the form of co-axial cable) can also be used at lower speeds and for shorter distances.

SRP/InfiniBand.  SRP (SCSI RDMA Protocol) [ SRP_draft] is a SCSI transport for InfiniBand [ Infiniband_trade_association], a high-performance interconnect running at 10 and 30 Gbps. SRP driver source is available at infiniband.sourceforge.net/Storage/SRP .

IEEE 1394.  This standard also goes by the name of "Fire Wire" [trademarked by Apple] and "iLink" [trademarked by Sony]. It is a serial bus that can run at up to 400 Megabits/sec (IEEE 1394a). A newer standard, IEEE 1394b, ups this to 800 Megabits/sec (with extensions to 1.6 and 3.2 Gigabits/sec) with cable runs up to 100 metres. It has a similar but more general architecture than USB. The IEEE 1394 standard allows for the SCSI command set to be carried over a 1394 bus. There is a "sbp2" driver now available for the Linux IEEE 1394 stack. This sbp2 driver is also a SCSI subsystem lower level driver (so it is functionally similar to the ide-scsi driver). So IEEE 1394 devices that use the SBP-2 protocol (e.g. disks, cd-rw/dvd drives, MO drives and scanners) can be accessed via the SCSI subsystem. See Linux1394.sourceforge.net for more information. The sbp2 driver is now in lk 2.4.7 .

iSCSI.  This is a new IETF standard for sending the SCSI command set over a TCP connection (or several of them). This permits SCSI devices (targets such as disks) to be network appliances, accessed locally (or potentially at a great distance) by a host machine.

NON SCSI buses.  The following buses are not defined by the SCSI standards but are of interest because they either can carry the SCSI command set, are in some way related to the Linux SCSI subsystem or supply a similar functionality to SCSI products.

IDE/ATA (ATAPI).  IDE is the most used disk type on PC systems today. The acronym stands for Integrated Drive Electronics and as the name suggests it places the bulk of the IO "intelligence" on the disk controller card rather than spreading it between the device (most often a disk) and a controller (HBA) as SCSI does. IDE grew out of the ST506 and ESDI standards in the 1980s. EIDE (extended IDE) is a related acronym. The modern standards that refer to this bus architecture are known as ATA and can be found at www.t13.org. The ATA Packet Interface (ATAPI) extends the disk oriented command set to support CDROM and tape drives. The ATAPI command set closely resembles the SCSI command set. The most recent ATA technology is outlined in the next paragraph.

ATA 133.  The ATA standards used by IDE devices have also been marching through the adjectives (e.g. fast and ultra) and the numbers (e.g. 2, 33, 66, 100 and 133). The most recent addition is ATA 133 which supports burst rates of 133 MB/sec and up to 2 devices per bus. [PCs typically have 2 and often 4 ATA buses.] ATA 66, 100 and 133 need a special cable. ATA cables are relatively short precluding IDE devices being external to the computer. Cable lengths have previously been limited to 18 inches although 1 metre long cables have now appeared. Coincidently 133 MB/sec in also the maximum throughput of the normal PCI bus found in most PCs. The are higher speed (and wider) versions of PCI but they are relatively rare.

Serial ATA (sATA).  Serial ATA uses 2 differential pairs to exchange data with a sATA disk less than 1 metre away at 1.5 Gigabits per second. One pair takes data to the disk and the other returns data from the disk. Data rates up to 150 Megabytes per second are possible (data transfer is half duplex). sATA is a point to point connection, not a bus, so ATA's master and slave strapping disappears. sATA cabling is less bulky and the form factor of its plugs and sockets are smaller than parallel ATA (and the SCSI Parallel interface). sATA devices are beginning to appear on the market. sATA-2 is a draft standard that doubles the serial data rate to 3 Gigabits per second.

USB.  Universal Serial Bus (USB) has a bandwidth of between 1.5 and 12 Megabits/sec (the latter speed with USB 1.1). Up to 127 devices can be connected using a series of hubs each of which connects up to 7 devices (with a 5 metre limit). USB supplies 5 volts at 0.5 amps to power small devices. USB is "plug and play", hot pluggable and supports isochronous data transfers (required for audio and video devices that need guaranteed minimum bandwidth).

PC Parallel port.  The original PC parallel port was uni-directional (towards the printer) and was capable of about 10 KB/sec. The IEEE 1284 standard in 1994 introduced 5 modes of data transfer:

Enhanced Parallel Port (EPP) achieves transfer speeds of between 500 KB/sec and 2 MB/sec and is targeted at CD-ROMs, tapes and hard drives. Extended Capability Port (ECP) includes run length encoding and support for DMA. ECP is targeted at fast printers and scanners.

I2O.  "The I2O (Intelligent Input/Output) specification defines a standard architecture for intelligent I/O that is independent of both the specific device being controlled and the host operating system (OS)" [from www.i2osig.org]. It defines a "split driver" model in which the OS Services Module (OSM) sits between the host OS device interface and the I2O communications layer while the Hardware Device Module (HDM) sits between the I2O communications layer and the hardware. The HDM may well run on a dedicated processor (IOP).